Cost Efficient Fault Tolerant Decoder in Reversible Logic Synthesis
نویسندگان
چکیده
منابع مشابه
Design and Synthesis of Fault Tolerant Decoder Using Reversible Logic
A binary decoder is a combinational logic circuit that converts a binary integer value to an associated pattern of output bits. They are used in a wide variety of applications, including data de-multiplexing, seven segment displays, and memory address decoding. This paper demonstrates the reversible logic synthesis for the n-to-2 n decoder, where n is the number of data bits. The circuits are d...
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ژورنال
عنوان ژورنال: International Journal of Computer Applications
سال: 2014
ISSN: 0975-8887
DOI: 10.5120/18881-0160